The present invention relates to a method of manufacturing a lateral insulated gate field effect transistor and particularly to a method of manufacturing a so-called XMOS transistor in which a pair of gate portions are formed on a channel forming portion of a semiconductor layer in an opposing relation to each other.
FIG. 1 of the accompanying drawings shows a fundamental arrangement of an XMOS transistor. As shown in FIG. 1, gate portions with first and second gate electrodes 3G.sub.1, 3G.sub.2 are disposed across a semiconductor layer 1 of low impurity concentration, i.e. p- or n- or intrinsic i type serving as a channel forming portion through a gate insulating layer 2 in an opposing relation to each other. Source and drain regions 4 are formed on both sides of the disposed portion of the pair of gate portions of the semiconductor layer 1 by implanting ions of n- or p-type impurity.
The thus arranged transistor has various features such that it is free from punchthrough, excellent in switching characteristics, characteristics can be controlled without introducing impurity into the channel region and that freedom in control operation is large because control voltages can be independently applied to the gate electrodes 3G.sub.1, 3G.sub.2.
In the XMOS transistor, a part of the semiconductor layer 1 is brought in contact with a single crystal substrate or the like and formed by solid phase epitaxial growth in the surface direction. Therefore, the semiconductor layer 1 with satisfactory crystallinity cannot be formed and a transistor having high carrier mobility cannot be realized under the present condition.